Flip-Flops/Counters MCQs

94 questionsTechnical-McqsPage 7 of 11

Practice free Flip-Flops/Counters multiple-choice questions with instant answer feedback and step-by-step solutions. Click an option to check yourself, reveal the full explanation, and work through all 94 questions — no login required.

Question 55easy
The output of a gated S-R flip-flop changes only if the:
Question 56easy
In VHDL, in which declaration section is a COMPONENT declared?
Question 57easy
The output pulse width of a 555 monostable circuit with R1 = 4.7 k and C1 = 47 F is ________.
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Question 58easy
If both inputs of an S-R flip-flop are low, what will happen when the clock goes HIGH?
Question 59easy
A push-button switch is used to input data to a register. The output of the register is erratic. What could be causing the problem?
Question 60easy
The pulse width of a one-shot circuit is determined by ________.
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Question 61easy
If both inputs of an S-R flip-flop are LOW, what will happen when the clock goes high?
Question 62easy
Four J-K flip-flops are cascaded with their J-K inputs tied HIGH. If the input frequency (fin) to the first flip-flop is 32 kHz, the output frequency (fout) is ________.
Question 63easy
The asynchronous inputs are normally labeled ________ and ________, and are normally active-________ inputs.