Flip-Flops/Counters MCQs

Question 1

Which of the following is not generally associated with flip-flops?

Accepted Answer

Interval time

Answer

Hold time

Answer

Propagation delay time

Answer

Set up time

Question 2

Edge-triggered flip-flops must have:

Accepted Answer

positive edge-detection circuits

Answer

very fast response times

Answer

at least two inputs to handle rising and falling edges

Answer

negative edge-detection circuits

Question 3

What is one disadvantage of an S-R flip-flop?

Accepted Answer

It has an invalid state.

Answer

It has no enable input.

Answer

It has no clock input.

Answer

It has only a single output.

Question 4

To completely load and then unload an 8-bit register requires how many clock pulses?

Accepted Answer

16

Answer

2

Answer

4

Answer

8

Question 5

Which of the following best describes the action of pulse-triggered FF's?

Accepted Answer

The data is entered on the leading edge of the clock, and transferred out on the trailing edge of the clock.

Answer

The clock and the S-R inputs must be pulse shaped.

Answer

A pulse on the clock transfers data from input to output.

Answer

The synchronous inputs must be pulsed.

Question 6

An invalid condition in the operation of an active-HIGH input S-R latch occurs when ________.

Accepted Answer

HIGHs are applied simultaneously to both inputs S and R

Answer

LOWs are applied simultaneously to both inputs S and R

Answer

a LOW is applied to the S input while a HIGH is applied to the R input

Answer

a HIGH is applied to the S input while a LOW is applied to the R input

Question 7

On a J-K flip-flop, when is the flip-flop in a hold condition?

Accepted Answer

J = 0, K = 0

Answer

J = 1, K = 0

Answer

J = 0, K = 1

Answer

J = 1, K = 1

Question 8

The output pulse width for a 555 monostable circuit with R1 = 3.3 k and C1 = 0.02 F is ________.

Accepted Answer

73 s

Answer

7.3 s

Answer

7.3 ms

Answer

73 ms

Question 9

Edge-triggered flip-flops must have:

Accepted Answer

a pulse transition detector.

Answer

very fast response times.

Answer

at least two inputs to handle rising and falling edges.

Answer

active-LOW inputs and complemented outputs.