Programmable Logic Device MCQs

Question 1

The designation up/down means that the ________.

Accepted Answer

up count is active-HIGH, the down count is active-LOW

Answer

up count is active-LOW, the down count is active-HIGH

Answer

up and down counts are both active-LOW

Answer

up and down counts are both active-HIGH

Question 2

Why can a synchronous counter operate at a higher frequency than a ripple counter?

Accepted Answer

The flip-flops change at the same time.

Answer

The flip-flops change one after the other.

Answer

A synchronous counter cannot operate at higher frequencies.

Answer

A ripple counter is faster.

Question 3

A multiplexed display being driven by a logic circuit:

Accepted Answer

accepts data inputs from several lines and allows one of them at a time to pass to the output

Answer

accepts data inputs from one line and passes this data to multiple output lines

Answer

accepts data inputs from multiple lines and passes this data to multiple output lines

Answer

accepts data inputs from several lines and multiplexes this input data to four BCD lines

Question 4

Which of the following is an example of a counter with a truncated modulus?

Accepted Answer

13

Answer

8

Answer

16

Answer

32

Question 5

Which of the following is a type of shift register counter?

Accepted Answer

Ring

Answer

Decade

Answer

Binary

Answer

BCD

Question 6

MOD-6 and MOD-12 counters and multiples are most commonly used as:

Accepted Answer

digital clocks

Answer

frequency counters

Answer

multiplexed displays

Answer

power consumption meters

Question 7

Which of the following is an invalid state in an 8421 BCD counter?

Accepted Answer

1100

Answer

0011

Answer

1001

Answer

1000

Question 8

After 10 clock cycles, and assuming that the DATA input had returned to 0 following the storage sequence, what values would be stored in Q4, Q3, Q2, Q1, Q0 of the register in Figure 7-5?

Accepted Answer

0,0,0,0,0

Answer

0,1,0,1,1

Answer

1,1,0,1,0

Answer

1,0,1,0,1

Question 9

How many different states does a 2-bit asynchronous counter have?

Accepted Answer

4

Answer

1

Answer

2

Answer

8