Flip-Flops and Timers MCQs

Question 1

The truth table for an S-R flip-flop has how many VALID entries?

Accepted Answer

3

Answer

1

Answer

4

Answer

2

Question 2

What is the significance of the J and K terminals on the J-K flip-flop?

Accepted Answer

There is no known significance in their designations.

Answer

The J represents "jump," which is how the Q output reacts whenever the clock goes HIGH and the J input is also HIGH.

Answer

The letters represent the initials of Johnson and King, the co-inventors of the J-K flip-flop.

Answer

All of the other letters of the alphabet are already in use.

Question 3

Which of the following describes the operation of a positive edge-triggered D-type flip-flop?

Accepted Answer

The output will follow the input on the leading edge of the clock.

Answer

If both inputs are HIGH, the output will toggle.

Answer

When both inputs are LOW, an invalid state exists.

Answer

The input is toggled into the flip-flop on the leading edge of the clock and is passed to the output on the trailing edge of the clock.

Question 4

What is one disadvantage of an S-R flip-flop?

Accepted Answer

It has a RACE condition.

Answer

It has no Enable input.

Answer

It has no clock input.

Answer

It has only a single output.

Question 5

A retriggerable one-shot has a pulse width of 10 ms; 3 ms after being triggered, another trigger pulse is applied. The resulting output pulse will be _________ ms.

Accepted Answer

13

Answer

3

Answer

7

Answer

10

Question 6

The S-R, D-type, and J-K flip-flops are all examples of _________________.

Accepted Answer

bistable multivibrators

Answer

astable multivibrators

Answer

monostable multivibrators

Answer

tristable multivibrators

Question 7

Edge-triggered flip-flops must have _________.

Accepted Answer

a positive-transition pulse generator

Answer

very fast response times

Answer

at least two inputs to handle rising and falling edges

Answer

a negative-transition pulse generator

Question 8

An S-R flip-flop can be triggered by ______, ______, or ________.

Accepted Answer

edges, levels, pulses

Answer

HIGHs, LOWs, PRESETs

Answer

HIGHs, LOWs, CLEARs

Answer

SETs, RESETs, HIGHs

Question 9

An S-R NAND latch with both of its inputs LOW has an output that is _____________.

Accepted Answer

unpredictable

Answer

floating

Answer

HIGH

Answer

LOW