Ex-OR and Ex-NOR Gates MCQs

Question 1

To subtract a signed number (the subtrahend) from another signed number (the minuend) in the 2's complement system, the minuend is ________.

Accepted Answer

never complemented

Answer

complemented only if it is positive

Answer

complemented only if it is negative

Answer

always complemented

Question 2

In an odd-parity system, the data that will produce a parity bit = 1 is ________.

Accepted Answer

All of the above

Answer

data = 1010011

Answer

data = 1111000

Answer

data = 1100000

Question 3

The addition of two signed numbers in the 2's complement system can cause overflow. For overflow to occur both numbers must ________.

Accepted Answer

have the same sign

Answer

be positive

Answer

be negative

Answer

have opposite signs

Question 4

A Karnaugh map will ________.

Accepted Answer

eliminate the need for tedious Boolean simplifications

Answer

allow any circuit to be implemented with just AND and OR gates

Answer

produce the simplest sum-of-products expression

Answer

give an overall picture of how the signals flow through the logic circuit

Question 5

An 8-bit binary number is input to an odd parity generator. The parity bit will equal 1 only if ________.

Accepted Answer

the number of 1s in the number is even

Answer

the number is odd

Answer

the number of 1s in the number is odd

Answer

the number is even

Question 6

Two 4-bit comparators are cascaded to form an 8-bit comparator. The cascading inputs of the most significant 4 bits should be connected ________.

Accepted Answer

to the outputs from the least significant 4-bit comparator

Answer

to the cascading inputs of the least significant 4-bit comparator

Answer

A = B to a logic high, A < b and a > B to a logic low

Answer

ground

Question 7

When Karnaugh mapping, we must be sure to use the ________ number of loops.

Accepted Answer

minimum

Answer

maximum

Answer

median

Answer

Karnaugh

Question 8

The final output of a POS circuit is generated by ________.

Accepted Answer

an AND

Answer

an OR

Answer

a NOR

Answer

a NAND

Question 9

After each circuit in a subsection of a VHDL program has been ________, they can be combined and the subsection can be tested.

Accepted Answer

tested

Answer

designed

Answer

engineered

Answer

produced