Digital Design MCQs

Question 1

The purpose of a pull-up resistor is to keep a terminal at a ________ level when it would normally be at a ________ level.

Accepted Answer

HIGH, float

Answer

LOW, float

Answer

clock, float

Answer

pulsed, float

Question 2

Setup time specifies:

Accepted Answer

the minimum time the control levels need to be maintained on the inputs prior to the triggering edge of the clock in order to be reliably clocked into the flip-flop

Answer

the maximum time interval required for the control levels to remain on the inputs before the triggered edge of the clock in order for the data to be reliably clocked out of the flip-flop

Answer

how long the operator has to get the flip-flop running before the maximum power level is exceeded

Answer

how long it takes the output to change states after the clock has transitioned

Question 3

A Schmitt trigger:

Accepted Answer

has two trip points and positive feedback

Answer

has two trip points

Answer

is a zero crossing detector

Answer

has positive feedback

Question 4

A settable flip-flop's normal starting state when power is first applied to a circuit is always the ________ state.

Accepted Answer

set

Answer

reset

Answer

toggle

Answer

dual

Question 5

In the automatic reset circuit for a flip-flop, how long does it take the capacitor to completely charge?

Accepted Answer

5 time constants (RC)

Answer

1 time constant (RC)

Answer

2 time constants (RC)

Answer

10 time constants (RC)

Question 6

The output of a standard TTL NAND gate is used to pull an LED indicator LOW. The LED is in series with a 470- resistor. What is the current in the circuit when the LED is on?

Accepted Answer

7.02 mA

Answer

8.51 mA

Answer

10.63 mA

Answer

5.32 mA

Question 7

When the inputs to a flip-flop are changing at the same time that the active trigger edge of the input clock is making its transition, this condition is called:

Accepted Answer

racing

Answer

toggling

Answer

slave loading

Answer

pulse timing

Question 8

Which of the following flip-flop timing parameters indicates the time it takes a Q output to respond to a Cp

Accepted Answer

tPHL, tPLH

Answer

ts, th

Answer

tw (L), tw (H)

Answer

fmax

Question 9

How much setup time (ts) is required for the 74LS76?

Accepted Answer

20 ns

Answer

5 ns

Answer

10 ns

Answer

40 ns