Logic Families and Their Characteristics MCQs

Question 1

If all inputs to a TTL NAND gate are low, what is the ON, OFF condition of each transistor in the circuit?

Accepted Answer

Q1-ON, Q2-OFF, Q3-ON, Q4-OFF

Answer

Q1-ON, Q2-ON, Q3-OFF, Q4-OFF

Answer

Q1-OFF, Q2-OFF, Q3-ON, Q4-ON

Answer

Q1-OFF, Q2-ON, Q3-OFF, Q4-ON

Question 2

Which of the following summarizes the important features of emitter-coupled logic (ECL)?

Accepted Answer

low noise margin, low output voltage swing, negative voltage operation, fast, and high power consumption

Answer

good noise immunity, negative logic, high-frequency capability, low power dissipation, and short propagation time

Answer

low propagation time, high-frequency response, low power consumption, and high output voltage swings

Answer

poor noise immunity, positive supply voltage operation, good low-frequency operation, and low power

Question 3

Why is a pull-up resistor needed for an open collector gate?

Accepted Answer

to provide the HIGH voltage

Answer

to provide Vcc for the IC

Answer

to provide ground for the IC

Answer

to provide the LOW voltage

Question 4

Why is a pull-up resistor needed when connecting TTL logic to CMOS logic?

Accepted Answer

to increase the output HIGH voltage

Answer

to increase the output LOW voltage

Answer

to decrease the output LOW voltage

Answer

to decrease the output HIGH voltage

Question 5

The word "interfacing" as applied to digital electronics usually means:

Accepted Answer

a circuit connected between the driver and load to condition a signal so that it is compatible with the load

Answer

a conditioning circuit connected between a standard TTL NAND gate and a standard TTL OR gate

Answer

any gate that is a TTL operational amplifier designed to condition signals between NMOS transistors

Answer

any TTL circuit that is an input buffer stage

Question 6

The rise time (tr) is the time it takes for a pulse to rise from its ________ point up to its ________ point. The fall time (tf) is the length of time it takes to fall from the ________ to the ________ point.

Accepted Answer

10%, 90%, 90%, 10%

Answer

90%, 10%, 10%, 90%

Answer

20%, 80%, 80%, 20%

Answer

10%, 70.7%, 70.7%, 10%

Question 7

PMOS and NMOS ________.

Accepted Answer

represent MOSFET devices utilizing either P-channel or N-channel devices exclusively within a given gate

Answer

are enhancement-type CMOS devices used to produce a series of high-speed logic known as 74HC

Answer

represent positive and negative MOS-type devices, which can be operated from differential power supplies and are compatible with operational amplifiers

Answer

None of the above

Question 8

Why is the operating frequency for CMOS devices critical for determining power dissipation?

Accepted Answer

At high frequencies, charging and discharging the gate capacitance will draw a heavy current from the power supply and thus increase power dissipation.

Answer

At low frequencies, power dissipation increases.

Answer

At high frequencies, the gate will only be able to deliver 70.7 % of rated power.

Answer

At high frequencies, the gate will only be able to deliver 70.7 % of rated power and charging and discharging the gate capacitance will draw a heavy current from the power supply and thus increase power dissipation.

Question 9

Ten TTL loads per TTL driver is known as:

Accepted Answer

fan-out

Answer

noise immunity

Answer

power dissipation

Answer

propagation delay