Integrated Circuit Logic Families MCQs

Question 1

Which of the following logic families has the highest maximum clock frequency?

Accepted Answer

AS-TTL

Answer

S-TTL

Answer

HS-TTL

Answer

HCMOS

Question 2

Why is the fan-out of CMOS gates frequency dependent?

Accepted Answer

The input gates of the FETs are predominantly capacitive, and as the signal frequency increases the capacitive loading also increases, thereby limiting the number of loads that may be attached to the output of the driving gate.

Answer

Each CMOS input gate has a specific propagation time and this limits the number of different gates that can be connected to the output of a CMOS gate.

Answer

When the frequency reaches the critical value, the gate will only be capable of delivering 70% of the normal output voltage and consequently the output power will be one-half of normal; this defines the upper operating frequency.

Answer

The higher the number of gates attached to the output, the more frequently they will have to be serviced, thus reducing the frequency at which each will be serviced with an input signal.

Question 3

Logic circuits that are designated as buffers, drivers, or buffer/drivers are designed to have:

Accepted Answer

a greater current/voltage capability than an ordinary logic circuit.

Answer

greater input current/voltage capability than an ordinary logic circuit.

Answer

a smaller output current/voltage capability than an ordinary logic.

Answer

greater input and output current/voltage capability than an ordinary logic circuit.

Question 4

Which of the following will not normally be found on a data sheet?

Accepted Answer

Minimum LOW level output voltage

Answer

Minimum HIGH level output voltage

Answer

Maximum LOW level output voltage

Answer

Maximum HIGH level input current

Question 5

Which of the following logic families has the shortest propagation delay?

Accepted Answer

AS-TTL

Answer

S-TTL

Answer

HS-TTL

Answer

HCMOS

Question 6

Which of the following summarizes the important features of ECL?

Accepted Answer

Low noise margin, low output voltage swing, negative voltage operation, fast, and high power consumption

Answer

Good noise immunity, negative logic, high frequency capability, low power dissipation, and short propagation time

Answer

Slow propagation time, high frequency response, low power consumption, and high output voltage swings

Answer

Poor noise immunity, positive supply voltage operation, good low frequency operation, and low power

Question 7

What must be done to interface TTL to CMOS?

Accepted Answer

A pull-up resistor must be used between the TTL output-CMOS input node and Vcc; the value of RP will depend on the number of CMOS gates connected to the node.

Answer

A dropping resistor must be used on the CMOS 12 V supply to reduce it to 5 V for the TTL.

Answer

As long as the CMOS supply voltage is 5 V, they can be interfaced; however, the fan-out of the TTL is limited to five CMOS gates.

Answer

A 5 V Zener diode must be placed across the inputs of the TTL gates in order to protect them from the higher output voltages of the CMOS gates.

Question 8

What causes low-power Schottky TTL to use less power than the 74XX series TTL?

Accepted Answer

A larger value resistor

Answer

The Schottky-clamped transistor

Answer

Nothing. The 74XX series uses less power.

Answer

Using NAND gates

Question 9

What are the major differences between the 5400 and 7400 series of ICs?

Accepted Answer

The 5400 series are military grade and allow for a wider range of supply voltages and temperatures.

Answer

The 5400 series are military grade and require tighter supply voltages and temperatures.

Answer

The 7400 series are an improvement over the original 5400s.

Answer

The 7400 series was originally developed by Texas Instruments. The 5400 series was brought out by National Semiconductors after TI's patents expired, as a second supply source.